home *** CD-ROM | disk | FTP | other *** search
/ Chip: Special Tips & Tricks for Windows 95 / Chip Wintips.iso / sterown / grafika / w95fgl23 / w95fgl23.exe / FIGLV37.SDD / FIGLV37.SDD
Encoding:
Text File  |  1995-09-14  |  54.6 KB  |  1,560 lines
  1. // 
  2. //  Copyright (c) 1995 SPEA Software AG All Rights Reserved
  3. // 
  4. //# @(#)figlv37.sdd  3.00   95/08/09 SPEA   (BIOS 1.01)
  5. // 
  6. //  figlv37.sdd  -  SVPMI File for SPEA FIRE GL
  7. // 
  8. //  1600x1200x16 76.6 / 61  kHz / Hz
  9. //  1600x1200x8  76.6 / 61  kHz / Hz
  10. //  1280x1024x32 63.7 / 60  kHz / Hz
  11. //  1280x1024x16 63.7 / 60  kHz / Hz
  12. //  1280x1024x8  63.7 / 60  kHz / Hz
  13. //  1152x864x8   55.7 / 61  kHz / Hz
  14. //  1024x768x32  48.5 / 60  kHz / Hz
  15. //  1024x768x16  48.5 / 60  kHz / Hz
  16. //  1024x768x8   48.5 / 60  kHz / Hz
  17. //  800x600x32   38.0 / 60  kHz / Hz
  18. //  800x600x16   38.0 / 60  kHz / Hz
  19. //  800x600x8    38.0 / 60  kHz / Hz
  20. //  640x480x32   38.1 / 73  kHz / Hz
  21. //  640x480x16   38.1 / 73  kHz / Hz
  22. //  640x480x8    38.1 / 73  kHz / Hz
  23. //  640x400x8    31.4 / 70  kHz / Hz
  24.  
  25. [VERSION]
  26.  1.0;
  27.  
  28. [ACTIVE_ADAPTER]
  29.  SPEA FIRE GL (bis 37 kHz Multiscan);
  30.  
  31. [ADAPTER]
  32.  SPEA FIRE GL (bis 37 kHz Multiscan);
  33.  
  34. [ADAPTER_INFO]
  35.  BoardType = VGA;
  36.  SaveSize = 100;
  37.  PaletteSize = 768;
  38.  //# MemorySize = 0;
  39.  
  40. // ***********************************
  41. // 0x007E
  42. // ***********************************
  43. [MODE]
  44.  0x007E;
  45. [MODEINFO]
  46.     ModeAttributes      = 0x1b;
  47.     WinAAttributes      = 7;
  48.     WinBAttributes      = 0;
  49.     WinAGranularity     = 64;
  50.     WinBGranularity     = 64;
  51.     WinASize            = 64;
  52.     WinBSize            = 64;
  53.     WinABase            = 0xa0000;
  54.     WinBBase            = 0xa0000;
  55.     BytesPerScanline    = 3200;
  56.     XResolution         = 1600;
  57.     YResolution         = 1200;
  58.     XCharSize           = 8;
  59.     YCharSize           = 16;
  60.     Colormodel          = 2;
  61.     BitsPerPixel        = 16;
  62.     NumberOfColors      = 65536;
  63.     BitsRGB             = 6;
  64.     NumberOfBanks       = 1;
  65.     BankSize            = 0;
  66.     MemoryModel         = 0x6;
  67.     NumberOfImagePages  = 0;
  68.  
  69. [SETMODE]
  70.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  71.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  72.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  73.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  74.  
  75.  r0  = 0x7e; r1  = 0x64; r2  = 0x62; r3  = 0x01; r4  = 0x67;
  76.  r5  = 0x11; r6  = 0xe8; r7  = 0x00; r8  = 0x00; r9  = 0x00;
  77.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  78.  r15 = 0x00; r16 = 0xc0; r17 = 0x8c; r18 = 0xaf; r19 = 0x90;
  79.  r20 = 0x00; r21 = 0xaf; r22 = 0x00; r23 = 0xa3; r24 = 0xaf;
  80.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  81.  
  82.  outb(0x3d4,0x3b);outb(0x3d5,0x77);
  83.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  84.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  85.  outb(0x3d4,0x5e);outb(0x3d5,0x57);
  86.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  87.  outb(0x3d4,0x6d);outb(0x3d5,0x14);
  88.  
  89.  
  90. // TVP3026 clock synthesis
  91. // N/M/P value: fc 3a b0, DCLK = 160363616 Hz
  92.  outb(0x3d4,0x55);
  93. // only p value
  94.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  95. // pixel clock
  96.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  97. // loop clock
  98.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  99.  
  100. // program pixel clock
  101.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  102.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  103.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  104.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x30);
  105.  
  106. // program loop clock
  107.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  108.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  109.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  110.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  111.  
  112. // enable pixel clock (bit 7)
  113.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb0);
  114.  
  115. // divider for pixel frequency
  116.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  117.  
  118. // set index for PLL to status reg (R_ONLY)
  119.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  120.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x06);
  121.  outb(0x3d5,0x00);
  122.  
  123. // Bit 2&3 set enable loading of DCLK parameters
  124.  outb(0x3c2,0x2f);
  125.  
  126. //# [SPEA]
  127.  //# SerialWord = 0xfc3ab0;
  128.  //# DacMode = 0x5;
  129.  //# Cr42 = 0x52;
  130.  
  131. // ***********************************
  132. // 0x007C
  133. // ***********************************
  134. [MODE]
  135.  0x007C;
  136. [MODEINFO]
  137.     ModeAttributes      = 0x1b;
  138.     WinAAttributes      = 7;
  139.     WinBAttributes      = 0;
  140.     WinAGranularity     = 64;
  141.     WinBGranularity     = 64;
  142.     WinASize            = 64;
  143.     WinBSize            = 64;
  144.     WinABase            = 0xa0000;
  145.     WinBBase            = 0xa0000;
  146.     BytesPerScanline    = 1600;
  147.     XResolution         = 1600;
  148.     YResolution         = 1200;
  149.     XCharSize           = 8;
  150.     YCharSize           = 16;
  151.     Colormodel          = 1;
  152.     BitsPerPixel        = 8;
  153.     NumberOfColors      = 256;
  154.     BitsRGB             = 6;
  155.     NumberOfBanks       = 1;
  156.     BankSize            = 0;
  157.     MemoryModel         = 0x4;
  158.     NumberOfImagePages  = 0;
  159.  
  160. [SETMODE]
  161.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  162.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  163.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  164.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  165.  
  166.  r0  = 0x7e; r1  = 0x64; r2  = 0x62; r3  = 0x01; r4  = 0x67;
  167.  r5  = 0x11; r6  = 0xe8; r7  = 0x00; r8  = 0x00; r9  = 0x00;
  168.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  169.  r15 = 0x00; r16 = 0xc0; r17 = 0x8c; r18 = 0xaf; r19 = 0xc8;
  170.  r20 = 0x00; r21 = 0xaf; r22 = 0x00; r23 = 0xa3; r24 = 0xaf;
  171.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  172.  
  173.  outb(0x3d4,0x3b);outb(0x3d5,0x77);
  174.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  175.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  176.  outb(0x3d4,0x5e);outb(0x3d5,0x57);
  177.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  178.  outb(0x3d4,0x6d);outb(0x3d5,0x12);
  179.  
  180.  
  181. // TVP3026 clock synthesis
  182. // N/M/P value: fc 3a b0, DCLK = 160363616 Hz
  183.  outb(0x3d4,0x55);
  184. // only p value
  185.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  186. // pixel clock
  187.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  188. // loop clock
  189.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  190.  
  191. // program pixel clock
  192.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  193.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  194.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  195.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x30);
  196.  
  197. // program loop clock
  198.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  199.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  200.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  201.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  202.  
  203. // enable pixel clock (bit 7)
  204.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb0);
  205.  
  206. // divider for pixel frequency
  207.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x39);
  208.  
  209. // set index for PLL to status reg (R_ONLY)
  210.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  211.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  212.  outb(0x3d5,0x00);
  213.  
  214. // Bit 2&3 set enable loading of DCLK parameters
  215.  outb(0x3c2,0x2f);
  216.  
  217. //# [SPEA]
  218.  //# SerialWord = 0xfc3ab0;
  219.  //# DacMode = 0x2;
  220.  //# Cr42 = 0x52;
  221.  
  222. // ***********************************
  223. // 0x007B
  224. // ***********************************
  225. [MODE]
  226.  0x007B;
  227. [MODEINFO]
  228.     ModeAttributes      = 0x1b;
  229.     WinAAttributes      = 7;
  230.     WinBAttributes      = 0;
  231.     WinAGranularity     = 64;
  232.     WinBGranularity     = 64;
  233.     WinASize            = 64;
  234.     WinBSize            = 64;
  235.     WinABase            = 0xa0000;
  236.     WinBBase            = 0xa0000;
  237.     BytesPerScanline    = 3840;
  238.     XResolution         = 1280;
  239.     YResolution         = 1024;
  240.     XCharSize           = 8;
  241.     YCharSize           = 8;
  242.     Colormodel          = 2;
  243.     BitsPerPixel        = 32;
  244.     NumberOfColors      = 16777216;
  245.     BitsRGB             = 6;
  246.     RedSize             = 8;
  247.     RedPosition         = 16;
  248.     GreenSize           = 8;
  249.     GreenPosition       = 8;
  250.     BlueSize            = 8;
  251.     BluePosition        = 0;
  252.     ReservedSize        = 8;
  253.     ReservedPosition    = 24;
  254.     NumberOfBanks       = 1;
  255.     BankSize            = 0;
  256.     MemoryModel         = 0x6;
  257.     NumberOfImagePages  = 0;
  258.  
  259. [SETMODE]
  260.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  261.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  262.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  263.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  264.  
  265.  r0  = 0x67; r1  = 0x4f; r2  = 0x50; r3  = 0x86; r4  = 0x52;
  266.  r5  = 0x9e; r6  = 0x22; r7  = 0x42; r8  = 0x00; r9  = 0x40;
  267.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  268.  r15 = 0x00; r16 = 0x02; r17 = 0x85; r18 = 0xff; r19 = 0x80;
  269.  r20 = 0x00; r21 = 0x00; r22 = 0x31; r23 = 0xe3; r24 = 0xff;
  270.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  271.  
  272.  outb(0x3d4,0x3b);outb(0x3d5,0x60);
  273.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  274.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  275.  outb(0x3d4,0x5e);outb(0x3d5,0x55);
  276.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  277.  outb(0x3d4,0x6d);outb(0x3d5,0x12);
  278.  
  279.  
  280. // TVP3026 clock synthesis
  281. // N/M/P value: e8 11 b1, DCLK = 109963622 Hz
  282.  outb(0x3d4,0x55);
  283. // only p value
  284.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  285. // pixel clock
  286.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  287. // loop clock
  288.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  289.  
  290. // program pixel clock
  291.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  292.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xe8);
  293.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x11);
  294.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  295.  
  296. // program loop clock
  297.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  298.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf9);
  299.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  300.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  301.  
  302. // enable pixel clock (bit 7)
  303.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  304.  
  305. // divider for pixel frequency
  306.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  307.  
  308. // set index for PLL to status reg (R_ONLY)
  309.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  310.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  311.  outb(0x3d5,0x00);
  312.  
  313. // Bit 2&3 set enable loading of DCLK parameters
  314.  outb(0x3c2,0x2f);
  315.  
  316. //# [SPEA]
  317.  //# SerialWord = 0xe811b1;
  318.  //# DacMode = 0x7;
  319.  //# Cr42 = 0xe;
  320.  
  321. // ***********************************
  322. // 0x007A
  323. // ***********************************
  324. [MODE]
  325.  0x007A;
  326. [MODEINFO]
  327.     ModeAttributes      = 0x1a;
  328.     WinAAttributes      = 7;
  329.     WinBAttributes      = 0;
  330.     WinAGranularity     = 64;
  331.     WinBGranularity     = 64;
  332.     WinASize            = 64;
  333.     WinBSize            = 64;
  334.     WinABase            = 0xa0000;
  335.     WinBBase            = 0xa0000;
  336.     BytesPerScanline    = 2560;
  337.     XResolution         = 1280;
  338.     YResolution         = 1024;
  339.     XCharSize           = 8;
  340.     YCharSize           = 16;
  341.     Colormodel          = 2;
  342.     BitsPerPixel        = 16;
  343.     NumberOfColors      = 65536;
  344.     BitsRGB             = 6;
  345.     RedSize             = 5;
  346.     RedPosition         = 11;
  347.     GreenSize           = 6;
  348.     GreenPosition       = 5;
  349.     BlueSize            = 5;
  350.     BluePosition        = 0;
  351.     ReservedSize        = 0;
  352.     ReservedPosition    = 0;
  353.     NumberOfBanks       = 1;
  354.     BankSize            = 0;
  355.     MemoryModel         = 0x6;
  356.     NumberOfImagePages  = 0;
  357.  
  358. [SETMODE]
  359.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  360.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  361.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  362.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  363.  
  364.  r0  = 0x67; r1  = 0x4f; r2  = 0x50; r3  = 0x86; r4  = 0x52;
  365.  r5  = 0x9e; r6  = 0x22; r7  = 0x42; r8  = 0x00; r9  = 0x40;
  366.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  367.  r15 = 0x00; r16 = 0x02; r17 = 0x85; r18 = 0xff; r19 = 0x40;
  368.  r20 = 0x00; r21 = 0x00; r22 = 0x31; r23 = 0xe3; r24 = 0xff;
  369.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  370.  
  371.  outb(0x3d4,0x3b);outb(0x3d5,0x60);
  372.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  373.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  374.  outb(0x3d4,0x5e);outb(0x3d5,0x55);
  375.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  376.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  377.  
  378.  
  379. // TVP3026 clock synthesis
  380. // N/M/P value: e8 11 b1, DCLK = 109963622 Hz
  381.  outb(0x3d4,0x55);
  382. // only p value
  383.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  384. // pixel clock
  385.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  386. // loop clock
  387.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  388.  
  389. // program pixel clock
  390.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  391.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xe8);
  392.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x11);
  393.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  394.  
  395. // program loop clock
  396.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  397.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  398.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  399.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  400.  
  401. // enable pixel clock (bit 7)
  402.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  403.  
  404. // divider for pixel frequency
  405.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  406.  
  407. // set index for PLL to status reg (R_ONLY)
  408.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  409.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x06);
  410.  outb(0x3d5,0x00);
  411.  
  412. // Bit 2&3 set enable loading of DCLK parameters
  413.  outb(0x3c2,0x2f);
  414.  
  415. //# [SPEA]
  416.  //# SerialWord = 0xe811b1;
  417.  //# DacMode = 0x5;
  418.  //# Cr42 = 0x4e;
  419.  
  420. // ***********************************
  421. // 0x006F
  422. // ***********************************
  423. [MODE]
  424.  0x006F;
  425. [MODEINFO]
  426.     ModeAttributes      = 0x1b;
  427.     WinAAttributes      = 7;
  428.     WinBAttributes      = 0;
  429.     WinAGranularity     = 64;
  430.     WinBGranularity     = 64;
  431.     WinASize            = 64;
  432.     WinBSize            = 64;
  433.     WinABase            = 0xa0000;
  434.     WinBBase            = 0xa0000;
  435.     BytesPerScanline    = 1280;
  436.     XResolution         = 1280;
  437.     YResolution         = 1024;
  438.     XCharSize           = 8;
  439.     YCharSize           = 16;
  440.     Colormodel          = 1;
  441.     BitsPerPixel        = 8;
  442.     NumberOfColors      = 256;
  443.     BitsRGB             = 6;
  444.     NumberOfBanks       = 1;
  445.     BankSize            = 0;
  446.     MemoryModel         = 0x4;
  447.     NumberOfImagePages  = 0;
  448.  
  449. [SETMODE]
  450.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  451.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  452.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  453.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  454.  
  455.  r0  = 0x67; r1  = 0x4f; r2  = 0x50; r3  = 0x86; r4  = 0x52;
  456.  r5  = 0x9e; r6  = 0x22; r7  = 0x42; r8  = 0x00; r9  = 0x40;
  457.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  458.  r15 = 0x00; r16 = 0x02; r17 = 0x85; r18 = 0xff; r19 = 0xa0;
  459.  r20 = 0x00; r21 = 0x00; r22 = 0x31; r23 = 0xe3; r24 = 0xff;
  460.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  461.  
  462.  outb(0x3d4,0x3b);outb(0x3d5,0x60);
  463.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  464.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  465.  outb(0x3d4,0x5e);outb(0x3d5,0x55);
  466.  outb(0x3d4,0x67);outb(0x3d5,0x18);
  467.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  468.  
  469.  
  470. // TVP3026 clock synthesis
  471. // N/M/P value: e8 11 b1, DCLK = 109963622 Hz
  472.  outb(0x3d4,0x55);
  473. // only p value
  474.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  475. // pixel clock
  476.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  477. // loop clock
  478.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  479.  
  480. // program pixel clock
  481.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  482.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xe8);
  483.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x11);
  484.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  485.  
  486. // program loop clock
  487.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  488.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  489.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  490.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  491.  
  492. // enable pixel clock (bit 7)
  493.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  494.  
  495. // divider for pixel frequency
  496.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x39);
  497.  
  498. // set index for PLL to status reg (R_ONLY)
  499.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  500.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  501.  outb(0x3d5,0x00);
  502.  
  503. // Bit 2&3 set enable loading of DCLK parameters
  504.  outb(0x3c2,0x2f);
  505.  
  506. //# [SPEA]
  507.  //# SerialWord = 0xe811b1;
  508.  //# DacMode = 0x2;
  509.  //# Cr42 = 0x4e;
  510.  
  511. // ***********************************
  512. // 0x004E
  513. // ***********************************
  514. [MODE]
  515.  0x004E;
  516. [MODEINFO]
  517.     ModeAttributes      = 0x1b;
  518.     WinAAttributes      = 7;
  519.     WinBAttributes      = 0;
  520.     WinAGranularity     = 64;
  521.     WinBGranularity     = 64;
  522.     WinASize            = 64;
  523.     WinBSize            = 64;
  524.     WinABase            = 0xa0000;
  525.     WinBBase            = 0xa0000;
  526.     BytesPerScanline    = 1152;
  527.     XResolution         = 1152;
  528.     YResolution         = 864;
  529.     XCharSize           = 8;
  530.     YCharSize           = 16;
  531.     Colormodel          = 1;
  532.     BitsPerPixel        = 8;
  533.     NumberOfColors      = 256;
  534.     BitsRGB             = 6;
  535.     NumberOfBanks       = 1;
  536.     BankSize            = 0;
  537.     MemoryModel         = 0x4;
  538.     NumberOfImagePages  = 0;
  539.  
  540. [SETMODE]
  541.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  542.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  543.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  544.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  545.  
  546.  r0  = 0x55; r1  = 0x47; r2  = 0x47; r3  = 0x00; r4  = 0x49;
  547.  r5  = 0x0f; r6  = 0x94; r7  = 0xff; r8  = 0x00; r9  = 0x60;
  548.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  549.  r15 = 0x00; r16 = 0x70; r17 = 0x83; r18 = 0x5f; r19 = 0x90;
  550.  r20 = 0x60; r21 = 0x6f; r22 = 0x8d; r23 = 0xeb; r24 = 0xff;
  551.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  552.  
  553.  outb(0x3d4,0x3b);outb(0x3d5,0x4e);
  554.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  555.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  556.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  557.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  558.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  559.  
  560.  
  561. // TVP3026 clock synthesis
  562. // N/M/P value: fc 3a b1, DCLK = 80181808 Hz
  563.  outb(0x3d4,0x55);
  564. // only p value
  565.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  566. // pixel clock
  567.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  568. // loop clock
  569.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  570.  
  571. // program pixel clock
  572.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  573.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  574.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  575.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  576.  
  577. // program loop clock
  578.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  579.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  580.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  581.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  582.  
  583. // enable pixel clock (bit 7)
  584.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  585.  
  586. // divider for pixel frequency
  587.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x39);
  588.  
  589. // set index for PLL to status reg (R_ONLY)
  590.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  591.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  592.  outb(0x3d5,0x00);
  593.  
  594. // Bit 2&3 set enable loading of DCLK parameters
  595.  outb(0x3c2,0xef);
  596.  
  597. //# [SPEA]
  598.  //# SerialWord = 0xfc3ab1;
  599.  //# DacMode = 0x2;
  600.  //# Cr42 = 0x8c;
  601.  
  602. // ***********************************
  603. // 0x0078
  604. // ***********************************
  605. [MODE]
  606.  0x0078;
  607. [MODEINFO]
  608.     ModeAttributes      = 0x1a;
  609.     WinAAttributes      = 7;
  610.     WinBAttributes      = 0;
  611.     WinAGranularity     = 64;
  612.     WinBGranularity     = 64;
  613.     WinASize            = 64;
  614.     WinBSize            = 64;
  615.     WinABase            = 0xa0000;
  616.     WinBBase            = 0xa0000;
  617.     BytesPerScanline    = 4096;
  618.     XResolution         = 1024;
  619.     YResolution         = 768;
  620.     XCharSize           = 8;
  621.     YCharSize           = 16;
  622.     Colormodel          = 2;
  623.     BitsPerPixel        = 32;
  624.     NumberOfColors      = 16777216;
  625.     BitsRGB             = 6;
  626.     RedSize             = 8;
  627.     RedPosition         = 16;
  628.     GreenSize           = 8;
  629.     GreenPosition       = 8;
  630.     BlueSize            = 8;
  631.     BluePosition        = 0;
  632.     ReservedSize        = 8;
  633.     ReservedPosition    = 24;
  634.     NumberOfBanks       = 1;
  635.     BankSize            = 0;
  636.     MemoryModel         = 0x6;
  637.     NumberOfImagePages  = 0;
  638.  
  639. [SETMODE]
  640.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  641.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  642.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  643.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  644.  
  645.  r0  = 0x4f; r1  = 0x3f; r2  = 0x3f; r3  = 0x03; r4  = 0x42;
  646.  r5  = 0x0a; r6  = 0x20; r7  = 0xf5; r8  = 0x00; r9  = 0x60;
  647.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  648.  r15 = 0x00; r16 = 0x02; r17 = 0x88; r18 = 0xff; r19 = 0x00;
  649.  r20 = 0x00; r21 = 0xff; r22 = 0x20; r23 = 0xe3; r24 = 0xff;
  650.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  651.  
  652.  outb(0x3d4,0x3b);outb(0x3d5,0x48);
  653.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  654.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  655.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  656.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  657.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  658.  
  659.  
  660. // TVP3026 clock synthesis
  661. // N/M/P value: eb 28 b1, DCLK = 65082636 Hz
  662.  outb(0x3d4,0x55);
  663. // only p value
  664.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  665. // pixel clock
  666.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  667. // loop clock
  668.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  669.  
  670. // program pixel clock
  671.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  672.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xeb);
  673.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x28);
  674.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  675.  
  676. // program loop clock
  677.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  678.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x39);
  679.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  680.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  681.  
  682. // enable pixel clock (bit 7)
  683.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  684.  
  685. // divider for pixel frequency
  686.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  687.  
  688. // set index for PLL to status reg (R_ONLY)
  689.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  690.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  691.  outb(0x3d5,0x00);
  692.  
  693. // Bit 2&3 set enable loading of DCLK parameters
  694.  outb(0x3c2,0xef);
  695.  
  696. //# [SPEA]
  697.  //# SerialWord = 0xeb28b1;
  698.  //# DacMode = 0x7;
  699.  //# Cr42 = 0x49;
  700.  
  701. // ***********************************
  702. // 0x0077
  703. // ***********************************
  704. [MODE]
  705.  0x0077;
  706. [MODEINFO]
  707.     ModeAttributes      = 0x1b;
  708.     WinAAttributes      = 7;
  709.     WinBAttributes      = 0;
  710.     WinAGranularity     = 64;
  711.     WinBGranularity     = 64;
  712.     WinASize            = 64;
  713.     WinBSize            = 64;
  714.     WinABase            = 0xa0000;
  715.     WinBBase            = 0xa0000;
  716.     BytesPerScanline    = 2048;
  717.     XResolution         = 1024;
  718.     YResolution         = 768;
  719.     XCharSize           = 8;
  720.     YCharSize           = 16;
  721.     Colormodel          = 2;
  722.     BitsPerPixel        = 16;
  723.     NumberOfColors      = 65536;
  724.     BitsRGB             = 6;
  725.     RedSize             = 5;
  726.     RedPosition         = 11;
  727.     GreenSize           = 6;
  728.     GreenPosition       = 5;
  729.     BlueSize            = 5;
  730.     BluePosition        = 0;
  731.     ReservedSize        = 0;
  732.     ReservedPosition    = 0;
  733.     NumberOfBanks       = 1;
  734.     BankSize            = 0;
  735.     MemoryModel         = 0x6;
  736.     NumberOfImagePages  = 0;
  737.  
  738. [SETMODE]
  739.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  740.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  741.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  742.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  743.  
  744.  r0  = 0x4f; r1  = 0x3f; r2  = 0x3f; r3  = 0x03; r4  = 0x42;
  745.  r5  = 0x0a; r6  = 0x20; r7  = 0xf5; r8  = 0x00; r9  = 0x60;
  746.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  747.  r15 = 0x00; r16 = 0x02; r17 = 0x88; r18 = 0xff; r19 = 0x00;
  748.  r20 = 0x00; r21 = 0xff; r22 = 0x20; r23 = 0xe3; r24 = 0xff;
  749.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  750.  
  751.  outb(0x3d4,0x3b);outb(0x3d5,0x48);
  752.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  753.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  754.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  755.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  756.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  757.  
  758.  
  759. // TVP3026 clock synthesis
  760. // N/M/P value: eb 28 b1, DCLK = 65082636 Hz
  761.  outb(0x3d4,0x55);
  762. // only p value
  763.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  764. // pixel clock
  765.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  766. // loop clock
  767.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  768.  
  769. // program pixel clock
  770.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  771.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xeb);
  772.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x28);
  773.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  774.  
  775. // program loop clock
  776.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  777.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  778.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  779.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  780.  
  781. // enable pixel clock (bit 7)
  782.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  783.  
  784. // divider for pixel frequency
  785.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  786.  
  787. // set index for PLL to status reg (R_ONLY)
  788.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  789.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x06);
  790.  outb(0x3d5,0x00);
  791.  
  792. // Bit 2&3 set enable loading of DCLK parameters
  793.  outb(0x3c2,0xef);
  794.  
  795. //# [SPEA]
  796.  //# SerialWord = 0xeb28b1;
  797.  //# DacMode = 0x5;
  798.  //# Cr42 = 0x89;
  799.  
  800. // ***********************************
  801. // 0x006D
  802. // ***********************************
  803. [MODE]
  804.  0x006D;
  805. [MODEINFO]
  806.     ModeAttributes      = 0x1b;
  807.     WinAAttributes      = 7;
  808.     WinBAttributes      = 0;
  809.     WinAGranularity     = 64;
  810.     WinBGranularity     = 64;
  811.     WinASize            = 64;
  812.     WinBSize            = 64;
  813.     WinABase            = 0xa0000;
  814.     WinBBase            = 0xa0000;
  815.     BytesPerScanline    = 1024;
  816.     XResolution         = 1024;
  817.     YResolution         = 768;
  818.     XCharSize           = 8;
  819.     YCharSize           = 16;
  820.     Colormodel          = 1;
  821.     BitsPerPixel        = 8;
  822.     NumberOfColors      = 256;
  823.     BitsRGB             = 6;
  824.     NumberOfBanks       = 1;
  825.     BankSize            = 0;
  826.     MemoryModel         = 0x4;
  827.     NumberOfImagePages  = 0;
  828.  
  829. [SETMODE]
  830.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  831.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  832.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  833.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  834.  
  835.  r0  = 0x4f; r1  = 0x3f; r2  = 0x3f; r3  = 0x03; r4  = 0x42;
  836.  r5  = 0x0a; r6  = 0x20; r7  = 0xf5; r8  = 0x00; r9  = 0x60;
  837.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  838.  r15 = 0x00; r16 = 0x02; r17 = 0x88; r18 = 0xff; r19 = 0x80;
  839.  r20 = 0x00; r21 = 0xff; r22 = 0x20; r23 = 0xe3; r24 = 0xff;
  840.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  841.  
  842.  outb(0x3d4,0x3b);outb(0x3d5,0x48);
  843.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  844.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  845.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  846.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  847.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  848.  
  849.  
  850. // TVP3026 clock synthesis
  851. // N/M/P value: eb 28 b1, DCLK = 65082636 Hz
  852.  outb(0x3d4,0x55);
  853. // only p value
  854.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  855. // pixel clock
  856.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  857. // loop clock
  858.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  859.  
  860. // program pixel clock
  861.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  862.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xeb);
  863.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x28);
  864.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  865.  
  866. // program loop clock
  867.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  868.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  869.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  870.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  871.  
  872. // enable pixel clock (bit 7)
  873.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  874.  
  875. // divider for pixel frequency
  876.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x39);
  877.  
  878. // set index for PLL to status reg (R_ONLY)
  879.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  880.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  881.  outb(0x3d5,0x00);
  882.  
  883. // Bit 2&3 set enable loading of DCLK parameters
  884.  outb(0x3c2,0xef);
  885.  
  886. //# [SPEA]
  887.  //# SerialWord = 0xeb28b1;
  888.  //# DacMode = 0x2;
  889.  //# Cr42 = 0x89;
  890.  
  891. // ***********************************
  892. // 0x0075
  893. // ***********************************
  894. [MODE]
  895.  0x0075;
  896. [MODEINFO]
  897.     ModeAttributes      = 0x1b;
  898.     WinAAttributes      = 7;
  899.     WinBAttributes      = 0;
  900.     WinAGranularity     = 64;
  901.     WinBGranularity     = 64;
  902.     WinASize            = 64;
  903.     WinBSize            = 64;
  904.     WinABase            = 0xa0000;
  905.     WinBBase            = 0xa0000;
  906.     BytesPerScanline    = 3200;
  907.     XResolution         = 800;
  908.     YResolution         = 600;
  909.     XCharSize           = 8;
  910.     YCharSize           = 8;
  911.     Colormodel          = 2;
  912.     BitsPerPixel        = 32;
  913.     NumberOfColors      = 16777216;
  914.     BitsRGB             = 6;
  915.     RedSize             = 8;
  916.     RedPosition         = 16;
  917.     GreenSize           = 8;
  918.     GreenPosition       = 8;
  919.     BlueSize            = 8;
  920.     BluePosition        = 0;
  921.     ReservedSize        = 8;
  922.     ReservedPosition    = 24;
  923.     NumberOfBanks       = 1;
  924.     BankSize            = 0;
  925.     MemoryModel         = 0x6;
  926.     NumberOfImagePages  = 0;
  927.  
  928. [SETMODE]
  929.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  930.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  931.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  932.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  933.  
  934.  r0  = 0x3d; r1  = 0x33; r2  = 0x31; r3  = 0x00; r4  = 0x35;
  935.  r5  = 0x1d; r6  = 0x72; r7  = 0xf0; r8  = 0x00; r9  = 0x60;
  936.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  937.  r15 = 0x00; r16 = 0x58; r17 = 0x8c; r18 = 0x57; r19 = 0x90;
  938.  r20 = 0x00; r21 = 0x57; r22 = 0x00; r23 = 0xe3; r24 = 0xff;
  939.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  940.  
  941.  outb(0x3d4,0x3b);outb(0x3d5,0x36);
  942.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  943.  outb(0x3d4,0x5d);outb(0x3d5,0x08);
  944.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  945.  outb(0x3d4,0x67);outb(0x3d5,0x04);
  946.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  947.  
  948.  
  949. // TVP3026 clock synthesis
  950. // N/M/P value: fc 3a b2, DCLK = 40090904 Hz
  951.  outb(0x3d4,0x55);
  952. // only p value
  953.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  954. // pixel clock
  955.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  956. // loop clock
  957.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  958.  
  959. // program pixel clock
  960.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  961.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  962.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  963.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  964.  
  965. // program loop clock
  966.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  967.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf9);
  968.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  969.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf2);
  970.  
  971. // enable pixel clock (bit 7)
  972.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  973.  
  974. // divider for pixel frequency
  975.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  976.  
  977. // set index for PLL to status reg (R_ONLY)
  978.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  979.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  980.  outb(0x3d5,0x00);
  981.  
  982. // Bit 2&3 set enable loading of DCLK parameters
  983.  outb(0x3c2,0x2f);
  984.  
  985. //# [SPEA]
  986.  //# SerialWord = 0xfc3ab2;
  987.  //# DacMode = 0x7;
  988.  //# Cr42 = 0x84;
  989.  
  990. // ***********************************
  991. // 0x0074
  992. // ***********************************
  993. [MODE]
  994.  0x0074;
  995. [MODEINFO]
  996.     ModeAttributes      = 0x1b;
  997.     WinAAttributes      = 7;
  998.     WinBAttributes      = 0;
  999.     WinAGranularity     = 64;
  1000.     WinBGranularity     = 64;
  1001.     WinASize            = 64;
  1002.     WinBSize            = 64;
  1003.     WinABase            = 0xa0000;
  1004.     WinBBase            = 0xa0000;
  1005.     BytesPerScanline    = 1600;
  1006.     XResolution         = 800;
  1007.     YResolution         = 600;
  1008.     XCharSize           = 8;
  1009.     YCharSize           = 8;
  1010.     Colormodel          = 2;
  1011.     BitsPerPixel        = 16;
  1012.     NumberOfColors      = 65536;
  1013.     BitsRGB             = 6;
  1014.     RedSize             = 5;
  1015.     RedPosition         = 11;
  1016.     GreenSize           = 6;
  1017.     GreenPosition       = 5;
  1018.     BlueSize            = 5;
  1019.     BluePosition        = 0;
  1020.     ReservedSize        = 0;
  1021.     ReservedPosition    = 0;
  1022.     NumberOfBanks       = 1;
  1023.     BankSize            = 0;
  1024.     MemoryModel         = 0x6;
  1025.     NumberOfImagePages  = 0;
  1026.  
  1027. [SETMODE]
  1028.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1029.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1030.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1031.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1032.  
  1033.  r0  = 0x3d; r1  = 0x33; r2  = 0x31; r3  = 0x00; r4  = 0x35;
  1034.  r5  = 0x1d; r6  = 0x72; r7  = 0xf0; r8  = 0x00; r9  = 0x60;
  1035.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1036.  r15 = 0x00; r16 = 0x58; r17 = 0x8c; r18 = 0x57; r19 = 0xc8;
  1037.  r20 = 0x00; r21 = 0x57; r22 = 0x00; r23 = 0xe3; r24 = 0xff;
  1038.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1039.  
  1040.  outb(0x3d4,0x3b);outb(0x3d5,0x36);
  1041.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1042.  outb(0x3d4,0x5d);outb(0x3d5,0x08);
  1043.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1044.  outb(0x3d4,0x67);outb(0x3d5,0x14);
  1045.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1046.  
  1047.  
  1048. // TVP3026 clock synthesis
  1049. // N/M/P value: fc 3a b2, DCLK = 40090904 Hz
  1050.  outb(0x3d4,0x55);
  1051. // only p value
  1052.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1053. // pixel clock
  1054.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1055. // loop clock
  1056.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1057.  
  1058. // program pixel clock
  1059.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1060.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  1061.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  1062.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1063.  
  1064. // program loop clock
  1065.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1066.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1067.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1068.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf2);
  1069.  
  1070. // enable pixel clock (bit 7)
  1071.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1072.  
  1073. // divider for pixel frequency
  1074.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  1075.  
  1076. // set index for PLL to status reg (R_ONLY)
  1077.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1078.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x06);
  1079.  outb(0x3d5,0x00);
  1080.  
  1081. // Bit 2&3 set enable loading of DCLK parameters
  1082.  outb(0x3c2,0x2f);
  1083.  
  1084. //# [SPEA]
  1085.  //# SerialWord = 0xfc3ab2;
  1086.  //# DacMode = 0x5;
  1087.  //# Cr42 = 0xc4;
  1088.  
  1089. // ***********************************
  1090. // 0x006B
  1091. // ***********************************
  1092. [MODE]
  1093.  0x006B;
  1094. [MODEINFO]
  1095.     ModeAttributes      = 0x1b;
  1096.     WinAAttributes      = 7;
  1097.     WinBAttributes      = 0;
  1098.     WinAGranularity     = 64;
  1099.     WinBGranularity     = 64;
  1100.     WinASize            = 64;
  1101.     WinBSize            = 64;
  1102.     WinABase            = 0xa0000;
  1103.     WinBBase            = 0xa0000;
  1104.     BytesPerScanline    = 800;
  1105.     XResolution         = 800;
  1106.     YResolution         = 600;
  1107.     XCharSize           = 8;
  1108.     YCharSize           = 8;
  1109.     Colormodel          = 1;
  1110.     BitsPerPixel        = 8;
  1111.     NumberOfColors      = 256;
  1112.     BitsRGB             = 6;
  1113.     NumberOfBanks       = 1;
  1114.     BankSize            = 0;
  1115.     MemoryModel         = 0x4;
  1116.     NumberOfImagePages  = 0;
  1117.  
  1118. [SETMODE]
  1119.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1120.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1121.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1122.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1123.  
  1124.  r0  = 0x3d; r1  = 0x33; r2  = 0x31; r3  = 0x00; r4  = 0x35;
  1125.  r5  = 0x1d; r6  = 0x72; r7  = 0xf0; r8  = 0x00; r9  = 0x60;
  1126.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1127.  r15 = 0x00; r16 = 0x58; r17 = 0x8c; r18 = 0x57; r19 = 0x64;
  1128.  r20 = 0x00; r21 = 0x57; r22 = 0x00; r23 = 0xe3; r24 = 0xff;
  1129.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1130.  
  1131.  outb(0x3d4,0x3b);outb(0x3d5,0x36);
  1132.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1133.  outb(0x3d4,0x5d);outb(0x3d5,0x08);
  1134.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1135.  outb(0x3d4,0x67);outb(0x3d5,0x14);
  1136.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1137.  
  1138.  
  1139. // TVP3026 clock synthesis
  1140. // N/M/P value: fc 3a b2, DCLK = 40090904 Hz
  1141.  outb(0x3d4,0x55);
  1142. // only p value
  1143.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1144. // pixel clock
  1145.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1146. // loop clock
  1147.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1148.  
  1149. // program pixel clock
  1150.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1151.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  1152.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  1153.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1154.  
  1155. // program loop clock
  1156.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1157.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  1158.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1159.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf2);
  1160.  
  1161. // enable pixel clock (bit 7)
  1162.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1163.  
  1164. // divider for pixel frequency
  1165.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x39);
  1166.  
  1167. // set index for PLL to status reg (R_ONLY)
  1168.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1169.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  1170.  outb(0x3d5,0x00);
  1171.  
  1172. // Bit 2&3 set enable loading of DCLK parameters
  1173.  outb(0x3c2,0x2f);
  1174.  
  1175. //# [SPEA]
  1176.  //# SerialWord = 0xfc3ab2;
  1177.  //# DacMode = 0x2;
  1178.  //# Cr42 = 0xc4;
  1179.  
  1180. // ***********************************
  1181. // 0x0072
  1182. // ***********************************
  1183. [MODE]
  1184.  0x0072;
  1185. [MODEINFO]
  1186.     ModeAttributes      = 0x1b;
  1187.     WinAAttributes      = 7;
  1188.     WinBAttributes      = 0;
  1189.     WinAGranularity     = 64;
  1190.     WinBGranularity     = 64;
  1191.     WinASize            = 64;
  1192.     WinBSize            = 64;
  1193.     WinABase            = 0xa0000;
  1194.     WinBBase            = 0xa0000;
  1195.     BytesPerScanline    = 2560;
  1196.     XResolution         = 640;
  1197.     YResolution         = 480;
  1198.     XCharSize           = 8;
  1199.     YCharSize           = 16;
  1200.     Colormodel          = 2;
  1201.     BitsPerPixel        = 32;
  1202.     NumberOfColors      = 16777216;
  1203.     BitsRGB             = 6;
  1204.     RedSize             = 8;
  1205.     RedPosition         = 16;
  1206.     GreenSize           = 8;
  1207.     GreenPosition       = 8;
  1208.     BlueSize            = 8;
  1209.     BluePosition        = 0;
  1210.     ReservedSize        = 8;
  1211.     ReservedPosition    = 24;
  1212.     NumberOfBanks       = 1;
  1213.     BankSize            = 0;
  1214.     MemoryModel         = 0x6;
  1215.     NumberOfImagePages  = 0;
  1216.  
  1217. [SETMODE]
  1218.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1219.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1220.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1221.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1222.  
  1223.  r0  = 0x2f; r1  = 0x27; r2  = 0x27; r3  = 0x00; r4  = 0x2a;
  1224.  r5  = 0x0c; r6  = 0x06; r7  = 0x3e; r8  = 0x00; r9  = 0x40;
  1225.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1226.  r15 = 0x00; r16 = 0xe8; r17 = 0x8b; r18 = 0xdf; r19 = 0x40;
  1227.  r20 = 0x60; r21 = 0xdf; r22 = 0x06; r23 = 0xab; r24 = 0xff;
  1228.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1229.  
  1230.  outb(0x3d4,0x3b);outb(0x3d5,0x28);
  1231.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1232.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1233.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1234.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  1235.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1236.  
  1237.  
  1238. // TVP3026 clock synthesis
  1239. // N/M/P value: ae 2c b2, DCLK = 31650713 Hz
  1240.  outb(0x3d4,0x55);
  1241. // only p value
  1242.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1243. // pixel clock
  1244.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1245. // loop clock
  1246.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1247.  
  1248. // program pixel clock
  1249.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1250.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xae);
  1251.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x2c);
  1252.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1253.  
  1254. // program loop clock
  1255.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1256.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf9);
  1257.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1258.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf2);
  1259.  
  1260. // enable pixel clock (bit 7)
  1261.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1262.  
  1263. // divider for pixel frequency
  1264.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  1265.  
  1266. // set index for PLL to status reg (R_ONLY)
  1267.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1268.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  1269.  outb(0x3d5,0x00);
  1270.  
  1271. // Bit 2&3 set enable loading of DCLK parameters
  1272.  outb(0x3c2,0xef);
  1273.  
  1274. //# [SPEA]
  1275.  //# SerialWord = 0xae2cb2;
  1276.  //# DacMode = 0x7;
  1277.  //# Cr42 = 0x82;
  1278.  
  1279. // ***********************************
  1280. // 0x0071
  1281. // ***********************************
  1282. [MODE]
  1283.  0x0071;
  1284. [MODEINFO]
  1285.     ModeAttributes      = 0x1b;
  1286.     WinAAttributes      = 7;
  1287.     WinBAttributes      = 0;
  1288.     WinAGranularity     = 64;
  1289.     WinBGranularity     = 64;
  1290.     WinASize            = 64;
  1291.     WinBSize            = 64;
  1292.     WinABase            = 0xa0000;
  1293.     WinBBase            = 0xa0000;
  1294.     BytesPerScanline    = 1280;
  1295.     XResolution         = 640;
  1296.     YResolution         = 480;
  1297.     XCharSize           = 8;
  1298.     YCharSize           = 16;
  1299.     Colormodel          = 2;
  1300.     BitsPerPixel        = 16;
  1301.     NumberOfColors      = 65536;
  1302.     BitsRGB             = 6;
  1303.     RedSize             = 5;
  1304.     RedPosition         = 11;
  1305.     GreenSize           = 6;
  1306.     GreenPosition       = 5;
  1307.     BlueSize            = 5;
  1308.     BluePosition        = 0;
  1309.     ReservedSize        = 0;
  1310.     ReservedPosition    = 0;
  1311.     NumberOfBanks       = 1;
  1312.     BankSize            = 0;
  1313.     MemoryModel         = 0x6;
  1314.     NumberOfImagePages  = 0;
  1315.  
  1316. [SETMODE]
  1317.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1318.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1319.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1320.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1321.  
  1322.  r0  = 0x2f; r1  = 0x27; r2  = 0x27; r3  = 0x00; r4  = 0x2a;
  1323.  r5  = 0x0c; r6  = 0x06; r7  = 0x3e; r8  = 0x00; r9  = 0x40;
  1324.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1325.  r15 = 0x00; r16 = 0xe8; r17 = 0x8b; r18 = 0xdf; r19 = 0xa0;
  1326.  r20 = 0x60; r21 = 0xdf; r22 = 0x06; r23 = 0xab; r24 = 0xff;
  1327.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1328.  
  1329.  outb(0x3d4,0x3b);outb(0x3d5,0x28);
  1330.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1331.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1332.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1333.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1334.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1335.  
  1336.  
  1337. // TVP3026 clock synthesis
  1338. // N/M/P value: ae 2c b2, DCLK = 31650713 Hz
  1339.  outb(0x3d4,0x55);
  1340. // only p value
  1341.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1342. // pixel clock
  1343.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1344. // loop clock
  1345.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1346.  
  1347. // program pixel clock
  1348.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1349.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xae);
  1350.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x2c);
  1351.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1352.  
  1353. // program loop clock
  1354.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1355.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1356.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1357.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf2);
  1358.  
  1359. // enable pixel clock (bit 7)
  1360.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1361.  
  1362. // divider for pixel frequency
  1363.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  1364.  
  1365. // set index for PLL to status reg (R_ONLY)
  1366.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1367.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x06);
  1368.  outb(0x3d5,0x00);
  1369.  
  1370. // Bit 2&3 set enable loading of DCLK parameters
  1371.  outb(0x3c2,0xef);
  1372.  
  1373. //# [SPEA]
  1374.  //# SerialWord = 0xae2cb2;
  1375.  //# DacMode = 0x5;
  1376.  //# Cr42 = 0xc2;
  1377.  
  1378. // ***********************************
  1379. // 0x0069
  1380. // ***********************************
  1381. [MODE]
  1382.  0x0069;
  1383. [MODEINFO]
  1384.     ModeAttributes      = 0x1b;
  1385.     WinAAttributes      = 7;
  1386.     WinBAttributes      = 0;
  1387.     WinAGranularity     = 64;
  1388.     WinBGranularity     = 64;
  1389.     WinASize            = 64;
  1390.     WinBSize            = 64;
  1391.     WinABase            = 0xa0000;
  1392.     WinBBase            = 0xa0000;
  1393.     BytesPerScanline    = 640;
  1394.     XResolution         = 640;
  1395.     YResolution         = 480;
  1396.     XCharSize           = 8;
  1397.     YCharSize           = 16;
  1398.     Colormodel          = 1;
  1399.     BitsPerPixel        = 8;
  1400.     NumberOfColors      = 256;
  1401.     BitsRGB             = 6;
  1402.     NumberOfBanks       = 1;
  1403.     BankSize            = 0;
  1404.     MemoryModel         = 0x4;
  1405.     NumberOfImagePages  = 0;
  1406.  
  1407. [SETMODE]
  1408.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1409.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1410.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1411.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1412.  
  1413.  r0  = 0x2f; r1  = 0x27; r2  = 0x27; r3  = 0x00; r4  = 0x2a;
  1414.  r5  = 0x0c; r6  = 0x06; r7  = 0x3e; r8  = 0x00; r9  = 0x40;
  1415.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1416.  r15 = 0x00; r16 = 0xe8; r17 = 0x8b; r18 = 0xdf; r19 = 0x50;
  1417.  r20 = 0x60; r21 = 0xdf; r22 = 0x06; r23 = 0xab; r24 = 0xff;
  1418.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1419.  
  1420.  outb(0x3d4,0x3b);outb(0x3d5,0x28);
  1421.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1422.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1423.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1424.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1425.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1426.  
  1427.  
  1428. // TVP3026 clock synthesis
  1429. // N/M/P value: ae 2c b2, DCLK = 31650713 Hz
  1430.  outb(0x3d4,0x55);
  1431. // only p value
  1432.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1433. // pixel clock
  1434.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1435. // loop clock
  1436.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1437.  
  1438. // program pixel clock
  1439.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1440.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xae);
  1441.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x2c);
  1442.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1443.  
  1444. // program loop clock
  1445.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1446.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  1447.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1448.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf2);
  1449.  
  1450. // enable pixel clock (bit 7)
  1451.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1452.  
  1453. // divider for pixel frequency
  1454.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x39);
  1455.  
  1456. // set index for PLL to status reg (R_ONLY)
  1457.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1458.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  1459.  outb(0x3d5,0x00);
  1460.  
  1461. // Bit 2&3 set enable loading of DCLK parameters
  1462.  outb(0x3c2,0xef);
  1463.  
  1464. //# [SPEA]
  1465.  //# SerialWord = 0xae2cb2;
  1466.  //# DacMode = 0x2;
  1467.  //# Cr42 = 0xc2;
  1468.  
  1469. // ***********************************
  1470. // 0x0068
  1471. // ***********************************
  1472. [MODE]
  1473.  0x0068;
  1474. [MODEINFO]
  1475.     ModeAttributes      = 0x1b;
  1476.     WinAAttributes      = 7;
  1477.     WinBAttributes      = 0;
  1478.     WinAGranularity     = 64;
  1479.     WinBGranularity     = 64;
  1480.     WinASize            = 64;
  1481.     WinBSize            = 64;
  1482.     WinABase            = 0xa0000;
  1483.     WinBBase            = 0xa0000;
  1484.     BytesPerScanline    = 640;
  1485.     XResolution         = 640;
  1486.     YResolution         = 400;
  1487.     XCharSize           = 8;
  1488.     YCharSize           = 16;
  1489.     Colormodel          = 1;
  1490.     BitsPerPixel        = 8;
  1491.     NumberOfColors      = 256;
  1492.     BitsRGB             = 6;
  1493.     NumberOfBanks       = 1;
  1494.     BankSize            = 0;
  1495.     MemoryModel         = 0x4;
  1496.     NumberOfImagePages  = 0;
  1497.  
  1498. [SETMODE]
  1499.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1500.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1501.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1502.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1503.  
  1504.  r0  = 0x2d; r1  = 0x27; r2  = 0x28; r3  = 0x01; r4  = 0x2a;
  1505.  r5  = 0x10; r6  = 0xbf; r7  = 0x1f; r8  = 0x00; r9  = 0x40;
  1506.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1507.  r15 = 0x00; r16 = 0x9c; r17 = 0x8e; r18 = 0x8f; r19 = 0x50;
  1508.  r20 = 0x40; r21 = 0x96; r22 = 0xb9; r23 = 0xa3; r24 = 0xff;
  1509.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1510.  
  1511.  outb(0x3d4,0x3b);outb(0x3d5,0x26);
  1512.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1513.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1514.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1515.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1516.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1517.  
  1518.  
  1519. // TVP3026 clock synthesis
  1520. // N/M/P value: fd 3a b3, DCLK = 25056815 Hz
  1521.  outb(0x3d4,0x55);
  1522. // only p value
  1523.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1524. // pixel clock
  1525.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1526. // loop clock
  1527.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1528.  
  1529. // program pixel clock
  1530.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1531.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfd);
  1532.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  1533.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x33);
  1534.  
  1535. // program loop clock
  1536.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1537.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  1538.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1539.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf3);
  1540.  
  1541. // enable pixel clock (bit 7)
  1542.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb3);
  1543.  
  1544. // divider for pixel frequency
  1545.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x3b);
  1546.  
  1547. // set index for PLL to status reg (R_ONLY)
  1548.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1549.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  1550.  outb(0x3d5,0x00);
  1551.  
  1552. // Bit 2&3 set enable loading of DCLK parameters
  1553.  outb(0x3c2,0xef);
  1554.  
  1555. //# [SPEA]
  1556.  //# SerialWord = 0xfd3ab3;
  1557.  //# DacMode = 0x2;
  1558.  //# Cr42 = 0x80;
  1559.  
  1560.